Forty Years of Flip Chips with Solder Bumps


Paul A. Totta





During the summer of 1962, IBM reduced to practice the glass passivated flip chip transistor with  solder bump connections. There were only 3 bumps per chip with a 5 mil copper ball embedded in each to act as a "standoff" when the flip chip was attached to solder coated electrodes on a ceramic carrier. The standoff prevented solder from shorting to the edge of the bare silicon on the sides of the chip. Later, glass dams were created to interrupt the solder coating on the electrodes which prevented the chip solder from wetting out and collapsing the chip without the need for copper ball standoffs. The name given to the development was controlled collapse chip connection or C4. With time, integrated logic circuits needed more and more I/O to service the chip and it was discovered that the C4 could be safely put over active devices away from the chip edges. This gave birth to the idea of the area array. Over 40 years, the number of bumps on IBM chips has grown from 3 to 7018, and the interconnection idea has spread throughout the electronics world.


From the beginning there was a common Under Bump Metallization (Cr-Cu- Au } and high Pb chip solder (95-97% Pb/bal. Sn). High Pb solders provided a hierarchy of melting temperatures to prevent remelting of chip solder during module attach, and also provided a soft, ductile pad which did not stress thin films, yet provided compliance for thermal cycling. The world is now poised to eliminate Pb from microelectronics. This may be a desirable ecological objective, but may pose serious reliability and manufacturability problems for C4 technology. One proposal is that recycling of the hardware may be a better solution for some high reliability, high stress applications until understanding and innovations exist which may allow total replacement.