Patents List

Patents

*. US Patent disclosure submitted in January 1, 2007 : "A Method for Manufacturing of Dislocation-Free Uniaxially Strained Si Thin Films", Jeehwan Kim and Y. H. Xie (UCLA Case No. 2007-353).

*. US Patent publication # 2007/0111468, January 25, 2007 : "Method for fabricating dislocation-free stressed thin films", Jeehwan Kim and Y. H. Xie.

*. US Patent publication # 2007/0017438, May 17, 2007 : "Method of forming dislocation-free strained thin films", Jeehwan Kim and Y. H. Xie.

1. US Patent Number 7,186,626 March 6, 2007: “Method for controlling dislocation positions in silicon germanium buffer layers”, Y. H. Xie and T.S. Yoon.

2. US Patent Number 7,176,129 February 13, 2007: “Methods of fabricating highly conductive regions in semiconductor substrates for radio frequency applications”, King-Ning Tu, Ya-Hong Xie, and Chang-Ching Yeh;

3. US Patent Number 7,118,784, Oct. 10, 2006: “Method and apparatus for controlling nucleation in self-assembled films”, Y. H. Xie.

4. U.S. Patent Number 7,045,437, May 16, 2006: " Method for fabricating shallow trenches," Ya-Hong Xie;

5. U.S. Patent Number 6,633,056 B2, October 14, 2003: "Hetero-integration of Dissimilar Semiconductor Materials," Ya-Hong Xie;

6. U.S. Patent Number 6,633,056 B1, December 17, 2002: "Hetero-integration of Dissimilar Semiconductor Materials," Ya-Hong Xie;

7. U.S. Patent Number 6,495,385, December 17, 2002: "Hetero-integration of Dissimilar Semiconductor Materials," Ya-Hong Xie;

8. U.S. Patent Number 6,370,307, April 9, 2002: "Optical Device Formed On A Substrate With Thermal Isolation Regions Formed Therein", A.J. Bruce, A. Glebov, J. Shmulovich, and Y.H. Xie;

9. U.S. Patent Number 6,395,611, May 28, 2002: “An Inductor or Low Loss Interconnect and A Method of Manufacturing An Inductor or Low Loss Interconnect in an Integrated Circuit” N. Belk, william Cochran, Michel Frei, David Goldthorp, Shahriar Moinian, Kwok Ng, Mark Pinto, and Ya-Hong Xie;

10. U.S. Patent Number 6,312,581, November 6, 2001: "A Process for Fabricating an Optical Device", A. Bruce, A. Glebov, J. Shmulovich, and Y.H. Xie;

11. U.S. Patent Number 6136673, 10/24/2000, “A Process For Fabricating A Device With Shallow Junctions”, M.Frei, H.H.Vuong, and Y.H.Xie;

12. US Patent Number 5,888,885, 3/30/1999, “Method for fabricating three-dimensional quantum dot arrays and resulting products”, Y.H.Xie;

13. US Patent Number 5,767,561, 6/16/1998, “Integrated circuit device with isolated circuit elements”, M.Frei, C.A.King, K.K.Ng, H.T.Weston and Y.H.Xie;

14. US Patent Number 5,736,749, 4/7/1998, “Integrated Circuit Device with Inductor Incorporated Therein”, Y.H.Xie;

15. US Patent Number 5,442,205, 8/15/1995, "Semiconductor Heterostructure Devices with Strained Semiconductor Layers (Continuation-in-Part)", D. Brasen, E.A. Fitzgerald, M.L. Green, D.P. Monroe, P.J. Silverman, and Y.H. Xie;

16. US Patent Number 5,308,444, 5/3/1994, "Method of Making Semiconductor Heterostructure of Gallium Arsenide on Germanium", E.A. Fitzgerald, J.M. Kuo, P.J. Silverman and Y.H. Xie;

17. US Patent Number 5,239,193, 8/24/1993, "Silicon Photodiode for Monolithic Integrated Circuits," J.L. Benton, R.P. Jindal, and Y.H. Xie;

18. US Patent Number 5,221,413, 6/22/1993, "Method for Making Low Defect Density Semiconductor Heterostructure and Devices Made Thereby," D. Brasen, E.A. Fitzgerald, M.L. Green, and Y.H. Xie;

19. US Patent Number 5,141,878, 8/25/1992, "Silicon Photodiode for Monolithic Integrated Circuits and Method for Making Same," J.L. Benton, R.P. Jindal and Y.H. Xie.

20. US Patent Number 5,063,569, 11/5/1991, "Vertical-cavity Surface-emitting Laser with Non-epitaxial Multilayered Dielectric Reflectors Located on Both Surfaces," Y.H. Xie.

21. US Patent Number 5,012,486, 4/30/1991, "Vertical Cavity Semiconductor Laser With Lattice-Mismatched Mirror Stack," S. Luryi and Y. -H. Xie.

22. US Patent Number 4,999,843, 3/12/1991, "Vertical Semiconductor Laser With Lateral Electrode Contact," S. Luryi and Y. -H. Xie.

For Patent Documents Please Visit: www.uspto.gov/patft/