13th International Conference on Crystal Growth, Kyoto, 2001

Symposium Surfaces and Interfaces


Surface and Bulk Characterization of Thermally Induced Defects during

Silicon Single Wafer Epitaxy


Petra Feichtinger1, Mark S. Goorsky1, Frank Muemmler2, Dwain Oster2, and Jim Moreland3


1 Department of Materials Science and Engineering

University of California, Los Angeles

Los Angeles, CA 90095-1595


2 Wacker Siltronic Corp.

7200 Northwest Front Avenue

Portland, OR 97283


3 Wacker Siltronic AG

Johannes Hess Strasse

84479 Burghausen



We investigated generation of thermally induced defects during silicon single wafer epitaxy. The samples were 150 mm diameter Czochralski silicon test wafers. A variation of wafer thickness, epitaxial layer thickness, and doping level was employed. Epitaxial layers were deposited in a single wafer epitaxy reactor by vapor phase epitaxy at ~ 1100 C using trichlorosilane as a precursor gas. Temperature gradients were introduced in the wafers during the temperature ramp-up process. In the employed materials combinations, the introduced lattice misfit is too small to give rise to layer relaxation via misfit dislocations.

Laser light scatter scans were recorded using a surface scanner. The topography of the surface features was recorded using atomic force microscopy. High-resolution x-ray diffraction was used to quantify the crystalline quality in various sample regions. Double crystal x-ray topography in weak beam reflection mode and defect etching were employed for crystallographic defect imaging.

Laser surface scanner plots reveal light-point defect (LPD) patterns on the surface of wafers with epitaxial layer thickness ~ 7 mm. The aerial distribution of the LPD pattern changes between test wafers as the applied temperature gradient is changed. Atomic force microscope scans give insight into the shape of hillocks and trenches found on the otherwise smooth epitaxial surface.

A broader Full Width Half Maximum for Q/2Q triple axis diffraction scans as well as for rocking curves is found in areas of high surface LPD counts. Double crystal x-ray topographs reveal a strong black and white contrast of dot-like and tail-shaped features in regions where the surface defect exists. We contribute the contrast pattern found in certain wafer areas to a network of dislocations threading in an angle to the surface and thus causing the tail-shaped pattern. The etch features found from defect etching show that dislocations as well as stacking faults exist in the defective areas.

All results suggest that silicon substrate wafers are very sensitive to thermal slip during temperature ramp-up and epitaxial layer deposition steps. Due to steep temperature gradients, dislocations are shown to be generated in test wafers. They thread to the wafer surface in an angle. The observed surface features are generated due to a change in crystallographic order where the defects exist. The precursor gas trichlorosilane preferentially etches these features and thus works out a surface LPD pattern, which can easily be detected via surface light scatter. We show that double crystal x-ray topography is a suitable tool for reliable detection of thermal slip.