Puneet Gupta's home page

*Puneet Gupta*
*Assistant Professor*	*Electrical Engineering*

Email:
Phone:	+1-310-825-1376
Address:	6730C, Boelter Hall, Box 951594, UCLA, Los Angeles CA 90095-1594

Brief Bio

B. Tech, Electrical Engineering.	Indian Institute of Technology, New Delhi	2000. B. Tech Project Title: ``Task Partitioning Between a General Purpose Microprocessor and Reconfigurable Hardware''
Ph.D, Electrical Engineering.	University of California, San Diego	2007. Dissertation Title: ``On Compensating Systematic Variations in Physical Design''
Co-Founder and Product Architect.	Blaze DFM Inc, Sunnyvale CA (acquired by Tela Innovations Inc.).	2004-2007

Research Interests
Briefly, my research interests lie generally in optimizing across application-architecture-implementation-fabrication interfaces. Current focus of research in NanoCAD Lab is design-assisted technology scaling and underdesigned and opportunistic computing. I lead the IMPACT+ center and am part of the the NSF Expedition on Variability-Aware Software for Efficient Computing with Nanoscale Devices.
For further details, see NanoCAD Lab.

Professional Service

Technical Program Committee Member, DAC (2010-), ICCAD (2007- 2011), ICCD(2007), ISQED(2006-2009), SLIP(2007, 2008), DFM&Y(2007-), ASPDAC (2008-2011), VLSI Design (2008-2010)
Vice-Chair CADathlon at ICCAD, 2007
Finance Chair, SLIP, 2008
Track Chair, VLSI Design (2009-2010), ICCAD (2010-)
Session Chair, DAC 2007, DAC 2009
Program Chair, DFM&Y (2009-2011)
Editor, IETE Technical Review (2009)

Teaching

EE201A VLSI Design Automation
EE M116C/CS151B Computer Architecture
EE209AS The VLSI Design Manufacturing Interface
EE110 Circuit Analysis II
EE10 Circuit Analysis I

Books and Book Chapters

J. Lee and P. Gupta, Discrete Circuit Optimization: Library Based Gate Sizing and Threshold Voltage Assignment, Now Publishers, 2012.
P. Gupta and E. Papadopoulou, ``Yield Analysis and Optimization'', The Handbook of Algorithms for VLSI Physical Design Automation, CRC Press, 2011.

Awards

2012 IBM Faculty Award
2010 ACM/SIGDA Outstanding New Faculty Award
2009, 2010 SRC Inventor Recognition Award
2009 NSF Faculty Early Career Development (CAREER) Award
2007 European Design Automation Association (EDAA) Outstanding Dissertation Award.
IBM Ph.D. Fellowship, 2004.

Research and funding opportunities available for graduate students. Students who like to cross disciplinary boundaries (VLSI fabrication, devices, circuits, systems, algorithms, statistics ) are especially welcome. Only Ph.D. students and M.S. students who pursue a thesis option will be considered.
Few M.S. project topics are also available without funding. Please contact me for details.

M.S./Ph.D. APPLICANTS: READ THIS BEFORE SENDING ME ANY EMAIL.
For M.S., do not send me an email till you have already applied and sent in your materials. I will not begin looking at M.S./Ph.D. applications before December. When you send me an email, include the following: (1) Your resume in PDF format; (2) Copies/latest drafts of your undergraduate/M.S. thesis in PDF; (3) a brief review + suggestions for improvement of one paper of your choice from my webpage. Absolutely dont contact me if you are not serious and enthusiastic about research. I will only fund incoming Ph.D. or M.S/Ph.D. applicants. If you are in the LA area, feel free to schedule an appointment with me.

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