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previous years
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K. Tyagi and B. Razavi, "
A 56-Gb/s 17-mW NRZ Receiver in 0.018 mm2,"
Symposium on VLSI Circuits Dig. Of Tech. Papers, June 2024. |
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P. K. Khanna, Y. Zhao, M. Forghani and B. Razavi, "
A Low-Power 28-GHz Beamforming Receiver with On-Chip LO Synthesis,"
European Solid-State Circuits Conference, Sept. 2023. |
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M. Forghani, Y. Zhao, P. K. Khanna and B. Razavi, "
A 112-Gb/s 58-mW PAM4 Transmitter in 28-nm CMOS Technology,"
Symposium on VLSI Circuits Dig. Of Tech. Papers, pp. 1-2, June 2023. |
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M. Jara and B. Razavi, "A 6-bit 10-GS/s 17.6-mW CMOS ADC with 0.8-V supply,"
Proc. IEEE Custom Integrated Circuits Conference, April. 2023. |
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K. Tyagi and B. Razavi, "
Effect of ADC Clock Jitter on the Performance of PAM4 and PAM6 Receivers,"
IEEE International Symposium on Circuits and Systems, May 2023. |
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M. Snai and B. Razavi, "
Optimal Distribution of High-Speed Clocks on Transceiver Chips,"
IEEE International Symposium on Circuits and Systems, May 2022. |
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Y. Zhao and B. Razavi, "
Phase Noise Integration Limits for Jitter Calculation,"
IEEE International Symposium on Circuits and Systems, May 2022. |
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M. Forghani and B. Razavi, "
Circuit Bandwidth Requirements for NRZ and PAM4 Signals,"
IEEE International Symposium on Circuits and Systems, May 2022. |
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Y. Zhao, O. Memioglu and B. Razavi, "
A 56GHz 23mW Fractional-N PLL with 110fs Jitter,"
ISSCC Dig. Tech. Papers, pp. 1-3, Feb 2022. |
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O. Memioglu, Y. Zhao and B. Razavi, "
A 300GHz 52mW CMOS Receiver with On-Chip LO Generation,"
ISSCC Dig. Tech. Papers, pp. 1-3, Feb 2022. |
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B. Razavi, "
Low-Power Techniques for Wireline Systems,"
European Solid-State Circuits Conference, Sept. 2021. |
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Y. Zhao and B. Razavi, "
A 19-GHz PLL with 20.3-fs Jitter,"
Symposium on VLSI Circuits Dig. Of Tech. Papers, pp. 1-2, June 2021. |
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H. Razavi and B. Razavi, "
A 0.4-6 GHz Receiver for LTE and WiFi,"
Symposium on VLSI Circuits Dig. Of Tech. Papers, pp. 1-2, June 2021. |
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H. Razavi and B. Razavi, "
A 27-73 GHz Injection-Locked Frequency Divider,"
Symposium on VLSI Circuits Dig. Of Tech. Papers, pp. 1-2, June 2021. |
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G. Hou and B. Razavi, "
A 56-Gb/s 8-mW PAM4 CDR/DMUX with High Jitter Tolerance,"
Symposium on VLSI Circuits Dig. Of Tech. Papers, pp. 1-2, June 2021. |
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A. Atharav and B. Razavi, "
A 56Gb/s 50mW NRZ Receiver in 28nm CMOS,"
ISSCC Dig. Tech. Papers, pp. 192-194, Feb. 2021. |
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B. Razavi, "
Lower Bounds on Power Consumption of Clock Generators for ADCs,"
IEEE International Symposium on Circuits and Systems, Oct. 2020. |
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F. Song, Y. Zhao, B. Wu, L. Tang, L. Lin and B. Razavi, "
A Fractional-N Synthesizer with 110fsrms Jitter and a Reference Quadrupler for Wideband 802.11ax,"
ISSCC Dig. Tech. Papers, pp. 264-266, Feb. 2019. |
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L. Kong, Y. Chang and B. Razavi, "A 14 um * 26 um 20-Gb/s 3-mW CDR Circuit
with High Jitter Tolerance,"
Symposium on VLSI Circuits Dig. Of Tech. Papers, pp. 271-272, June 2018. |
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B. Razavi, "
An Alternative Analysis of Noise Folding in Fractional-N Synthesizers,"
IEEE International Symposium on Circuits and Systems, May 2018. |
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Y. Chang, A.Manian, L.Kong and B. Razavi, "A 32-mW 40-Gb/s CMOS NRZ Transmitter,"
Proc. IEEE Custom Integrated Circuits Conference, Apr. 2018. |
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L. Kong and B. Razavi, "A 2.4GHz RF Fractional-N Synthesizer with 0.25fREF BW,"
ISSCC Dig. Tech. Papers, pp. 330-331, Feb. 2017. |
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L. Kong and B. Razavi, "A 2.4-GHz 6.4-mW Fractional-N Inductorless RF Synthesizer,"
Symposium on VLSI Circuits Dig. Of Tech. Papers, pp. 236-237, June 2016. |
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A. Manian and B. Razavi, "A 40Gb/s 14 mW CMOS Wireline Receiver,"
ISSCC Dig. Tech. Papers, pp. 411-412, Feb. 2016. |
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A. Manian and B. Razavi, "A 40-Gb/s 9.2-mW CMOS Equalizer,"
Symposium on VLSI Circuits Dig. Of Tech. Papers, pp. 226-227, June 2015. |
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J. P. Mathew, L. Kong and B. Razavi, "A 12-Bit 200-MS/s 3.4-mW CMOS ADC with 0.85-V Supply,"
Symposium on VLSI Circuits Dig. Of Tech. Papers, pp. 66-67, June 2015. |
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B. Razavi, "The Future of Radios,"
IEEE International Symposium on Circuits and Systems, May 2015. |
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L. Kong and B. Razavi, "A 2.4GHz 4mW Inductorless RF Syntehsizer,"
ISSCC Dig. Tech. Papers, pp.450-451, Feb. 2015. |
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A. Manian and B. Razavi, "A 32-Gb/s 9.3-mW CMOS Equalizer with 0.73-V Supply,"
Proc. IEEE Custom Integrated Circuits Conference, Sept. 2014. |
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B. Razavi, "The Role of Translational Circuits in RF Receiver Design,"
Proc. IEEE Custom Integrated Circuits Conference, Sept. 2014. |
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S. Hwu and B. Razavi, "A Receiver Architecture for Intra-Band Carrier Aggregation,"
Symposium on VLSI Circuits Dig. Of Tech. Papers, pp.142-143, June 2014. |
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J. W. Jung and B. Razavi, "A 25Gb/s 5.8mW CMOS Equalizer,"
ISSCC Dig. Tech. Papers, pp.44-46, Feb. 2014. |
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J. W. Park and B. Razavi, "A 20mW GSM/WCDMA Receiver with RF Channel Selection,"
ISSCC Dig. Tech. Papers, pp.356-358, Feb. 2014. (Video: http://youtu.be/MNdpi2TPwvA) |
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B. Razavi, "Charge Steering: A Low-Power Design Paradigm,"
Proc. IEEE Custom Integrated Circuits Conference, Sept. 2013. |
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S. Hashemi and B. Razavi, "A 7.1-mW 1-GS/s ADC with 48-dB SNDR at Nyquist Rate,"
Proc. IEEE Custom Integrated Circuits Conference, Sept. 2013. |
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H. Wei and B. Razavi, "An 8-Bit 4-GS/s 120-mW CMOS ADC,"
Proc. IEEE Custom Integrated Circuits Conference, Sept. 2013. |
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A. Homayoun and B. Razavi, "A 5-GHz 11.6-mW CMOS Receiver for IEEE 802.11a Applications,"
Proc. IEEE Custom Integrated Circuits Conference, Sept. 2013. |
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B. Razavi, et. al. "A Low-Power 60-GHz CMOS Transceiver for WiGig Applications,"
Symposium on VLSI Circuits Dig. Of Tech. Papers, pp.300-301, June 2013. |
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S. W. Chiang, H. Sun, and B. Razavi, "A 10-Bit 800-MHz 19-mW CMOS ADC,"
Symposium on VLSI Circuits Dig. Of Tech. Papers, pp.100-101, June 2013. |
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B. Razavi, "Problem of Timing Mismatch in Interleaved ADCs,"
Proc. IEEE Custom Integrated Circuits Conference, Sept. 2012. |
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S. Hashemi, B. Razavi,"A 10-Bit 1-GS/s CMOS ADC with FOM=70 fJ/Conversion,"
Proc. IEEE Custom Integrated Circuits Conference, Sept. 2012. |
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J.W. Jung and B. Razavi, "A 25-Gb/s 5-mW CMOS CDR/Deserializer,"
Symposium on VLSI Circuits Dig. Of Tech. Papers, pp.138-139, June 2012. |
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B. Sahoo and B. Razavi, "A 10-Bit 1-GHz 33-mW CMOS ADC,"
Symposium on VLSI Circuits Dig. Of Tech. Papers, pp.30-31, June 2012. |
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J.W. Park and B. Razavi, "A Harmonic-Rejecting CMOS LNA for Broadband Radios,"
Symposium on VLSI Circuits Dig. Of Tech. Papers, pp.80-81, June 2012. |
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C.K. Liang and B. Razavi, "A Layout Technique for Millimeter-Wave PA Transistors,"
IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, pp.170-171, June 2011. |
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B. Razavi, "A 300-GHz Fundamental Oscillator in 65-nm CMOS Technology,"
Symposium on VLSI Circuits Dig. Of Tech. Papers, pp.113-114, June 2010. |
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S.
Ibrahim and B. Razavi, "A 20Gb/s 40mW Equalizer in 90nm CMOS Technology,"
ISSCC Dig.Tech. Papers, pp.170-171, Feb. 2010. |
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B. Razavi, "Challenges
in the Design of Cognitive Radios," Proc. IEEE Custom Integrated Circuits Conference, pp.
391-398, Sept. 2009. |
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M. Aboudina and B.
Razavi, "A Sigma-Delta CMOS ADC with 80-dB Dynamic Range and 31-MHz Signal
Bandwidth," Proc. Midwest Symp. on Circuits and Systems, pp. 397-401, August 2009. |
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B. Sahoo and B. Razavi, "A
Fast Simulator for Pipelined A/D Converters,"
Proc. Midwest Symp. on Circuits and Systems, pp. 402-406, August 2009. |
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S.
Ibrahim and B.
Razavi, "Design Requirements of 20-Gb/s Serial Links Using Multi-Tone
Signaling," Proc. International Symp. on Signals, Circuits, and Systems, pp.
341-344, July 2009. |
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B. Sahoo and B. Razavi, "U-PAS : A User-Friendly ADC Simulator for Courses on Analog Design," 2009 International Conference on Microelectronic Systems Education, pp. 77-80, July 2009. |
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B.
Razavi, "Multi-Decade
Carrier Generation for Cognitive Radios,"
VLSI Circuits Symp. Dig. Tech. Papers, pp.
120-121,
June 2009. |
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A.
Verma and B. Razavi, " A 10b 500MHz 55mW CMOS ADC,"
ISSCC Dig.Tech. Papers, pp.18-20, Feb. 2009. |
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B.
Razavi, "Phase-Locking
in Wireline Systems: Present and Future,"
IEEE Custom Integrated Circuits Conference, pp. 615-622, Sept. 2008. |
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A.
Parsa and B. Razavi, " A 60GHz CMOS Receiver Using a 30GHz LO,"
ISSCC Dig.Tech. Papers, pp.190-191, Feb. 2008. |
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B.
Razavi, "Design Considerations for Future RF Circuits," Proc.
International Conference on Circuits and Systems, pp. 741-744, May 2007, New
Orleans. |
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B.
Razavi, "CMOS Transceivers at 60 GHz and Beyond," Proc. International
Conference on Circuits and Systems, pp. 1983-1986, May 2007, New Orleans. |
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B. Razavi, " Heterodyne Phase Locking: A
Technique for High-Frequency Division,"
ISSCC Dig.Tech. Papers, pp.428-429, Feb. 2007. |
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B. Razavi, "A
mm-Wave CMOS Heterodyne Receiver with On-Chip LO and Divider," ISSCC Dig.Tech. Papers, pp.188-189, Feb. 2007. |
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A.
Verma and B. Razavi, "Frequency-Based Measurement of Mismatches Between Small
Capacitors," Proc. IEEE Custom Integrated Circuits Conference, pp.
481-484, Sept. 2006. |
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[Top]
K.
Abdelfattah and B. Razavi, "Modeling Op Amp Nonlinearity in
Switched-Capacitor Sigma-DeltaModulators," Proc. IEEE Custom Integrated
Circuits Conference, pp. 197-200, Sept. 2006. |
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B.
Razavi, "Mutual Injection Pulling Between Oscillators," Proc.
IEEE Custom Integrated Circuits Conference, pp. 675-678, Sept. 2006. |
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B.
Razavi, "CMOS Transceivers for the 60-GHz band," IEEE Radio Frequency
Integrated Circuits (RFIC) Symposium, pp 231-234, June 2006. |
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S. Gondi and B. Razavi,
"A 10-Gbit/s Merged Adaptive Equalizer/CDR Circuit for Serial-Link Receivers,"
VLSI Circuits Symp. Dig. Tech. Papers, pp. 240-241, June 2006. |
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B.
Razavi et al, "Multiband UWB transceivers," Proc.
IEEE Custom Integrated Circuits Conference, pp. 141-148, Sept 2005 |
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[Top]
H.
Rafati and B. Razavi, "A New Receiver Architecture for Multiple-Antenna
Systems", IEEE Custom Integrated Circuit conference, pp. 357-360,
Sept. 2005. |
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B. Razavi, "A 60-GHz Direct-Conversion CMOS Receiver," ISSCC Dig.Tech. Papers, pp.400-401, Feb. 2005.
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B. Razavi et al, "A 0.13-um CMOS UWB Transceiver," ISSCC Dig. Tech. Papers, pp.216-217, Feb. 2005.
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S. Gondi, Jri Lee, D. Takeuchi and B. Razavi, "A 10Gb/s CMOS Adaptive Equalizer for Backplane Applications," ISSCC Dig. Tech. Papers, pp.328-329, Feb. 2005. |
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[Top]
S. Galal and B. Razavi, "40Gb/s amplifier and ESD protection circuit in 0.18um CMOS technology,"
Dig.
International Solid-State Circuits Conference, pp.480-481, Feb. 2004. |
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B. Razavi,
“A Study of Injection Pulling and
Locking in Oscillators,” Proc. IEEE Custom Integrated Circuits Conference, pp. 305-308, October 2003. |
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[Top]
J. Lee and B. Razavi,
“Modeling of
Jitter in Bang-Bang
Clock and Data Recovery Circuits,” Proc. IEEE Custom Integrated Circuits Conference, pp. 711-714, October 2003.
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J. Lee and B. Razavi,
"A 40-GHz Frequency Divider in 0.18-um CMOS Technology," Symposium on VLSI Circuits Dig. Of Tech. Papers, pp. 259-262, June 2003.
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[Top]
J. Lee and B. Razavi,
"A 40Gb/s Clock and Data Recovery Circuit in 0.18um CMOS Technology," Dig. International Solid-State Circuits Conference, pp. 242-243, Feb. 2003.
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S. Galal and B. Razavi,
"10Gb/s Limiting Amplifier and Laser/Modulator Driver in 0.18um CMOS Technology," Dig. International Solid-State Circuits Conference, pp. 188-189, Feb. 2003.
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[Top]
S. Galal and B. Razavi,
"Broadband ESD Protection Circuits in CMOS Technology," Dig. International Solid-State Circuits Conference, pp. 182-183, Feb. 2003.
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A. Zolfaghari and B. Razavi,
"A Noninvasive Channel-Select Filter for a CMOS Bluetooth Receiver," Proc. IEEE Custom Integrated Circuits Conference, pp. 341-344, May 2002.
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[Top]
B. Razavi,
"The Role of Monolithic Transmission Lines in High-Speed Integrated Circuits," Proc. IEEE Custom Integrated Circuits Conference, pp. 367-374, May 2002.
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B. Razavi,
"Prospects of CMOS Technology for High-Speed Optical Communication Circuits," (Plenary Talk) GaAs IC Symposium Dig., October 2001.
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[Top]
J. Savoj and B. Razavi,
"Design of Half-Rate Clock and Data Recovery Circuits for Optical Communication Systems," Proc. Design Automation Conference, pp. 121-126, June 2001.
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T. C. Lee and B. Razavi,
"A Stabilization Technique for Phase-Locked Frequency Synthesizers," Symposium on VLSI Circuits Dig. of Tech. Papers, pp.
39-42, June 2001.
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T. C. Lee and B. Razavi,
"A 125-Mb/s CMOS Equalizer for Gigabit Ethernet," Proc. IEEE Custom Integrated Circuits Conference, pp. 131-134, May 2001.
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B. Razavi,
"Design of High-Speed Integrated Circuits for Optical
Communication Systems," (Invited) Proc. IEEE Custom
Integrated Circuits Conference, pp. 315-322, May 2001.
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A. Zolfaghari, A. Y. Chan, and B. Razavi, "A 2.4-GHz 34-mW CMOS Transceiver for Frequency-Hopping and Direct-Sequence Applications," Dig. International Solid-State Circuits Conference, pp. 418-419, Feb. 2001. |
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L. Der and
B. Razavi, "A 2-GHz CMOS Image-Reject Receiver with Sign-Sign
LMS Calibration," Dig. International Solid-State Circuits
Conference, pp. 294-295, Feb 2001. |
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S. B. Anand and B. Razavi,
"A 2.75-Gb/s CMOS Clock Recovery Circuit with Broad Capture Range," Dig. International Solid-State Circuits Conference, pp. 214-215, Feb. 2001.
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J. Savoj and B. Razavi,
"A 10-Gb/s CMOS Clock and Data Recovery Circuit with Frequency Detection," Dig. International Solid-State Circuits Conference, pp. 78-79, Feb. 2001.
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R. Montemayor and B. Razavi,
"A Self-Calibrating 900-MHz CMOS Image-Reject Receiver," Proc. of European Solid-State Circuits Conference, pp. 292-295, September 2000.
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[Top]
J. Savoj and B. Razavi,
"A 10-Gb/s CMOS Clock and Data Recovery Circuit," Symposium on VLSI Circuits Dig. of Tech. Papers, pp. 136-139, June 2000.
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B. Razavi,
"A 5.2-GHz CMOS Receiver with 62-dB Image Rejection," Symposium on VLSI Circuits Dig. of Tech. Papers, pp. 34-37, June 2000.
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A. Zolfaghari, A. Y. Chan, and B. Razavi, "Stacked Inductors and 1-to-2 Transformers in CMOS Technology," Proc. of IEEE Custom Integrated Circuits Conference, pp. 345-348, May 2000.
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S. B. Anand and B. Razavi,
"A 2.5-Gb/s Clock Recovery Circuit for NRZ Data in 0.4-?m CMOS Technology," Proc. of IEEE Custom Integrated Circuits Conference, pp. 379-382, May 2000.
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T. C. Lee and B. Razavi,
"A 4-Tap 125-MHz Mixed-Signal Echo Canceller for Gigabit Ethernet on Copper Wire," Proc. of IEEE Custom Integrated Circuits Conference, pp. 461-464, May 2000.
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B. Razavi,
"A 622 Mb/s 4.5 pA/Hz CMOS Transimpedance Amplifier," Dig. International Solid-State Circuits Conference, pp. 162-163, Feb. 2000.
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B. Razavi,
"RF CMOS Receiver Design for Wireless LAN Applications," (Invited) IEEE Radio and Wireless Conference, pp. 275-280, Aug. 1999.
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[Top]
C. Lam and B. Razavi,
"A 2.6-GHz/5.2-GHz Frequency Synthesizer in 0.4-?m CMOS Technology," Symposium on VLSI Circuits Dig. of Tech. Papers, pp. 117-120, June 1999.
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Y. T. Wang and B. Razavi,
"An 8-Bit 150-MHz CMOS A/D Converter," Proc. of IEEE Custom Integrated Circuits Conference, May 1999, San Diego.
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B. Razavi,
"RF Transmitter Architectures and Circuits," (Invited) Proc. of IEEE Custom Integrated Circuits Conference, May 1999, San Diego.
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C. Lam and B. Razavi,
"A 2.6-GHz/5.2-GHz CMOS Voltage-Controlled Oscillator," Dig. International Solid-State Circuits Conference, pp. 402-403, Feb. 1999.
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J. Savoj and B. Razavi,
"A CMOS Interface Circuit for Detection of 1.2-Gb/s RZ Data," Dig. International Solid-State Circuits Conference, pp. 278-279, Feb. 1999.
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B. Razavi,
"A 900-MHz/1.8-GHz CMOS Transmitter for Dual-Band Applications," Symposium on VLSI Circuits Dig. of Tech. Papers, pp. 128-131, June 1998.
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B. Razavi, "RF IC Design Challenges," (Invited) Proc. of Design Automation Conference, pp. 408-413, June 1998.
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F. Herzel and B. Razavi, "Oscillator Jitter Due to Supply and Substrate Noise," Proc. of IEEE Custom Integrated Circuits Conference, pp. 489-492, May 1998.
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B. Razavi,
"CMOS Technology Characterization for Analog and RF Design," (Invited) Proc. of IEEE Custom Integrated Circuits Conference, pp. 23-30, May 1998.
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B. Razavi,
"Architectures and Circuits for RF CMOS Receivers," (Invited) Proc. of IEEE Custom Integrated Circuits Conference, pp. 393-400, May 1998.
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B. Razavi,
"RF Design for Multi-Standard Wireless Transceivers," (Invited) First Annual UCSD Conf. on Wireless Comminications Conf. Record, pp. 61-64, March 1998.
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S. Wu and B. Razavi,
"A 900-MHz/1.8-GHz CMOS Receiver for Dual-Band Applications," Dig. International Solid-State Circuits Conference, pp. 124-125, Feb. 1998.
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B. Razavi,
"Next-Generation RF Circuits and Systems," (Invited) Proc. of 17th Conference on Advanced Research in VLSI, pp. 270-282, Sept. 1997.
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B. Razavi,
"A 900-MHz CMOS Direct-Conversion Receiver," Dig. of Symposium on VLSI Circuits, pp. 113-114, June 1997.
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B. Razavi,
"Design of Sample-and-Hold Amplifiers for High-Speed Data Converters," (Invited) Proc. IEEE Custom Integrated Circuits Conference, pp. 59-66, May 1997.
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B. Razavi,
"Challenges in the Design of Frequency Synthesizers for Wireless Applications,"(Invited) Proc. IEEE Custom Integrated Circuits Conference, pp. 395-402, May 1997.
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B. Razavi,
"A 1.8-GHz CMOS Voltage-Controlled Oscillator," Dig. International Solid-State Circuits Conference, pp. 388-389, Feb. 1997.
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B. Razavi,
"Challenges and Trends in RF Design," (Invited) Proc. IEEE ASIC Conference, pp. 81-86, Sept. 1996.
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B. Razavi,
"A 2-GHz 1.6-mW Phase-Locked Loop," Dig. Symposium on VLSI Circuits, pp. 26-27, June 1996.
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B. Razavi,
"A 1.5-V 900-MHz Downconversion Mixer," Dig. of International Solid-State Circuits Conference, pp. 48-49, Feb. 1996.
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B. Razavi,
"Analysis, Modeling, and Simulation of Phase Noise in Monolithic Voltage-Controlled Oscillators," Proc. Custom Integrated Circuits Conference, pp. 327-330, May 1995.
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B. Razavi,
"A 2.5-Gb/sec 15-mW BiCMOS Clock Recovery Circuit," Dig. of Symposium on VLSI Circuits, pp. 83-84, June 1995.
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B. Razavi and J. Sung,
"A 200-MHz 15-mW BiCMOS Sample-and-Hold Amplifier with 3-V Supply," Dig. of International Solid-State Circuits Conference, pp. 56-57, Feb. 1995.
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B. Razavi,
"A 100MHz 10-mW All-NPN Sample-and-Hold Circuit with 3-V Supply," Proc. of European Solid-State Circuits Conference, pp. 192-195, Sept. 1994.
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B. Razavi et al.,
"A 3-GHz 25-mW CMOS Phase-Locked Loop," Dig. of Symposium on VLSI Circuits, pp. 131-132, June 1994.
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B. Razavi, K. F. Lee, and R. H. Yan,
"A 13.4-GHz CMOS Frequency Divider," Dig. of International Solid- State Circuits Conference, pp. 224-225, Feb. 1994.
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B. Razavi and J. Sung,
"A 6-GHz 60-mW BiCMOS Phase-Locked Loop with 2-V Supply," Dig. of International Solid-State Circuits Conference, pp. 114-115, Feb. 1994.
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B. Razavi, Y. Ota, and R. G. Swartz,
"Low Voltage Techniques for High-Speed Digital Bipolar Circuits," Dig. of Symposium on VLSI Circuits, pp. 31-32, May 1993.
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B. Razavi and B. A. Wooley,"A 12-bit 5-MHz Two-Step CMOS ADC," Dig. of International Solid-State Circuits Conference, pp. 36-37, Feb. 1992.
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B. Razavi and B. A. Wooley,"A 12-bit 10-MHz BiCMOS Comparator," Proc. of IEEE Bipolar Circuits and Technology Meeting, pp. 289-292, Sept. 1991.
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